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DS1677
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POWER-UP/POWER-DOWN CONSIDERATIONS
When VCC is applied to the DS1677 and reaches a level greater than VCCTP (power-fail trip point), the
device becomes fully accessible after tRPU (250ms typical). Before tRPU elapses, all inputs are disabled.
When VCC drops below VCCSW, the device is switched over to the VBAT supply.
During power-up, when VCC returns to an in-tolerance condition, the RST pin is kept in the active state
for 250ms (typical) to allow the power supply and microprocessor to stabilize.
ADDRESS/COMMAND BYTE
The command byte for the DS1677 is shown in Figure 2. Each data transfer is initiated by a command
byte. Bits 0 through 6 specify the address of the registers to be accessed. The MSB (bit 7) is the
Read/Write bit. This bit specifies whether the accessed byte will be read or written. A read operation is
selected if bit 7 is a zero and a write operation is selected if bit 7 is a one. The address map for the
DS1677 is shown in Figure 3.
ADDRESS/COMMAND BYTE Figure 2
7
6
5
4
3
2
1
0
RD
WR
A6
A5
A4
A3
A2
A1
A0
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